You are required to design, construct and test a digital circuit that will display your
student number on a seven-segment display. A four bit modulo-11 counter (you will
build using state machine) from a hardware counter or a microcontroller is to provide
the data via a two channel multiplexer to a decoder.
A two channel, 4 bit multiplexer will provide the output to the seven-segment display.
The input channel A will receive its input from counter built in the CPLD. The input
channel B of the multiplexer will receive its input from a microcontroller. The channel
select line and the clock will also be provided by the microcontroller.
The decoder is to decode the data from the multiplexer and in turn drive the display.
The entire circuit is to be implemented using a CPLD and a microcontroller. The block
diagram is shown below.
Circuit Operation
The counter is to commence counting from the count that corresponds to the last digit
of your student number.
For example; for a student number of 1234567, the count sequence will commence
with seven. The binary code for seven will result in the decoder outputting the code
representing the second from the last digit of the student number (in this example 6).
The next count (8) in the sequence will result in the last digit (7) of the student number
being displayed and so on.
Use the order calculator below and get started! Contact our live support team for any assistance or inquiry.
[order_calculator]